Hi,
> No, there is no need for a CRITICAL statement in the case of multiple
> reads.
>....
> "read conflicts" what they should be (memory refresh cycle times, memory
> bank conflicts, a cache line in another CPU being more recent than the
> entry in RAM) are taken care of below the assembler language level.
>...
> Instead it just happens automagically at "hardware" level.
Thanks for the clarification. Is this true even in "low-end" SMPs such as
multiprocessor PCs? Why do algorithms books then still talk of the EREW
(Exclusive Read and Write) PRAM (Parallel Random Access Model) model and
many algorithms published by computer scientists count the number of
concurrent reads *and* writes (if any)?
Thanks,
Aleksandar
_____________________________________________
Aleksandar Donev
http://www.pa.msu.edu/~donev/
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(517) 432-6770
Department of Physics and Astronomy
Michigan State University
East Lansing, MI 48824-1116
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