Please accept our apologies for multiple copies of this email
+=========================================================================================+
*CALL FOR PAPERS*
International Workshop on Dynamic Reconfigurable
Network-on-Chip (DRNoC 2012)
http://www.gsem.fr/DRNoC2012/index.html
As part of
The International Conference on High Performance Computing &
Simulation (HPCS 2012)
http://hpcs12.cisedu.info/ or
http://cisedu.us/rp/hpcs12
July 2 – July 6, 2012
Madrid, Spain
+===========================================================================================+
*Important Dates:*
Abstract submission:
----------------------------------------------------February 22, 2012
Paper Submissions:
-----------------------------------------------------February 28, 2012
Acceptance Notification:
-----------------------------------------------March 21, 2012
Camera Ready Papers and Registration Due: -----------------April 11, 2012
Conference Dates:
------------------------------------------------------July 2 – 6, 2012
+===========================================================================================+
*SCOPE AND OBJECTIVES*
Emerging SoCs (System-on-Chip), such as those for mobile systems, are
typically battery-powered systems and have to support a wide range of
streaming applications such as video and audio. Network-on-chip (NoC) has
been recently proposed for SoC applications design to achieve better
performance and lower energy consumption when compared to conventional
on-chip bus architectures.
Several approaches have been proposed to deal with NoC and can be
classified into two main categories, design-time approaches and run-time
approaches. Design-time approaches are generally tailored an application
domain or a specific application by providing an application- specific NoC.
All parameters, such as the on-chip interconnect architecture (i.e.,
topology), routing, and switching schemes, are defined at design time.
However, NoC should be scalable and adaptive to support various
applications by selecting the most suitable parameters based on the
requirements of the current application and system conditions.
Recently, there has been a great deal of interest in the development of
run-time approaches for reconfigurable NoC. These approaches provide
techniques that allow NoC to autonomously adapt its structure and their
behavior during the course of their operation (i.e., in runtime). For
example, the number of VCs (virtual channels) and the buffer size per VC
can be dynamically adjusted based on the traffic load and network status.
DRNoC’12 workshop is intended to serve as a forum and bring together the
researchers and engineers in both academia and industry to exchange ideas,
share experiences, and report original works about all aspects of dynamic
reconfigurable NoC. It will cover current and new approaches and relevant
activities in the design, analysis, and evaluation of techniques for
dynamic reconfigurable NoC.
+===========================================================================================+
*Topics*
The Workshop topics of interest include (but are not limited to) the
following:
- Topologies reconfiguration for NoC
- Routing algorithms, switching techniques, and flow control schemes
- Mapping and scheduling of tasks into NoC
- Self-reconfiguration and self-optimization of NoC
- Bio-inspired techniques for reconfigurable NoC
- Analytical evaluation methods for designing reconfigurable NoC
- Area, energy, and performance evaluation
- Tools for design space exploration of reconfigurable NoC
- Cases studies and FPGA-based implementation of reconfigurable NoC
+===========================================================================================+
For more information and submission guidelines, please visit:
http://www.gsem.fr/DRNoC2012/index.html
or
http://hpcs12.cisedu.info/ or http://cisedu.us/rp/hpcs12
+===========================================================================================+
Best regards,
--Workshop chairs
Dr. Mohamed Bakhouya
Aalto university, Finland
Dr. Jaafar Gaber
University of Technology of Belfort-Montbeliard, France
