[Apologies if you receive multiple copies of this CFP]
IA^3 2016 - Sixth Workshop on Irregular Applications: Architectures and Algorithms
http://hpc.pnl.gov/IA3
November 13 2016
9:00 AM - 5:30 PM
Room 251-D
Salt Lake City, UT
To be held in conjunction with SC16
To be held in cooperation with SIGHPC
Theme
Irregular applications occur in many subject matters. While inherently parallel, they exhibit highly variable execution performance at a local level due to unpredictable memory access patterns and/or network transfers, divergent control structures, and data imbalances. Moreover, they often require fine-grain synchronization and communication on large-data structures such as graphs, trees, unstructured grids, tables, sparse matrices, deep nets, and their combinations (such as, for example, attributed graphs). They have a significant degree of latent parallelism, which however is difficult to exploit due to their complex behavior. Current high performance architectures rely on data locality and regular computation to reduce access latencies, and often do not cope well with the requirements of these applications. Furthermore, irregular applications are difficult to scale on current supercomputing machines, due to their limits in fine-grained synchronization and small data transfers.
Irregular applications pertain both to well established and emerging fields, such as machine learning, social network analysis, bioinformatics, semantic graph databases, Computer Aided Design (CAD), and computer security. Many of these application areas also process massive sets of unstructured data, which keep growing exponentially. Addressing the issues of irregular applications on current and future architectures will become critical to solve the challenges in science and data analysis of the next few years.
This workshop seeks to explore solutions for supporting efficient execution of irregular applications in the form of new features at the level of the micro- and system-architecture, network, languages and libraries, runtimes, compilers, analysis, algorithms.
Preliminary Program
9:00 - 9:10 Welcome and Introduction
9:10 - 9:50 Keynote 1 - Software
High Level Abstractions and Automatic Optimization Techniques for the
programming of Irregular Algorithms
Prof. David Padua (UIUC)
9:50 - 10:00 Session 1: Parallel Graph Algorithms
Fast Parallel Cosine K-Nearest Neighbor Graph Construction
David Anastasiu and George Karypis
10:00 - 10:30 Coffee Break
10:30 - 11:10 Session 2: Compilers and Irregular Applications
10:30 - 10:50 Compiler Transformation to Generate Hybrid Sparse Computations
Huihui Zhang, Anand Venkat and Mary Hall
10:50 - 11:10 An OpenCL Framework for Distributed Apps on a Multidimensional Network
of FPGAs
Abhijeet Lawande, Alan George and Herman Lam
11:10 - 10:50 Session 3: Irregular Algorithms on GPUs
11:10 - 11:30 An Optimized Multicolor Point-Implicit Solver for Unstructured Grid
Applications on Graphics Processing Units
Mohammad Zubair, Eric Nielsen, Justin Luitjens and Dana Hammond
11:30 - 11:40 Dynamic Load Balancing for High-Performance Graph Processing on Hybrid
CPU-GPU Platforms
Stijn Heldens, Ana Lucia Varbanescu and Alexandru Iosup
11:40 -11:50 A Fast Level-Set Segmentation Algorithm for Image Processing Designed For
Parallel Architectures
Julian Gutierrez, Fanny Nina Paravecino and David Kaeli
11:50 - 12:30 Session 4: Sparse Matrices and Tensors
11:50 - 12:10 Optimizing Sparse Tensor Times Matrix on Multi-core and Many-core
Architectures
Jiajia Li, Yuchen Ma, Chenggang Yan and Richard Vuduc
12:10 - 12:20 Performance Evaluation of Parallel Sparse Tensor Decomposition
Implementations
Thomas Rolinger, Tyler Simon and Christopher Krieger
12:20 - 12:30 HISC/R: An Efficient Hypersparse-Matrix Storage Format for Scalable Graph
Processing
Robert Kirchgessner, Giovanni De La Torre, Alan George and Vitaliy
Gleyzer
12:30 - 2:00 Lunch Break (on your own)
2:00 - 2:40 Keynote 2 - Architectures
Dr. Paolo Faraboschi (HPE)
2:40 - 3:00 Session 5: Emerging Architectures
2:40 - 3:00 Highly Scalable Near Memory Processing with Migrating Threads on the Emu
System Architecture
Timothy Dysart, Peter Kogge, Martin Deneroff, Eric Bovell, Preston Briggs, Jay
Brockman, Kenneth Jacobsen, Yujen Juan, Shannon Kuntz, Richard Lethin,
Janice McMahon, Chandra Pawar, Martin Perrigo, Sarah Rucker, John
Ruttenberg, Max Ruttenberg and Steve Stein
3:00 - 3:30 Coffee Break
3:30 - 4:00 Session 6: Irregular Algorithms on Novel Processors
3:30 - 3:50 Parallel Interval Stabbing on the Automata Processor
Indranil Roy, Ankit Srivastava, Matt Grimm and Srinivas Aluru
3:50 - 4:00 Implementation and evaluation of data-compression algorithms for irregular-grid
iterative methods on the PEZY-SC processor
Naoki Yoshifuji, Ryo Sakamoto, Keigo Nitadori and Jun Makino
4:00 - 4:20 Session 7: Runtimes and Irregularity
4:00 - 4:10 Fine-grained parallelism in probabilistic parsing with Habanero Java
Matthew Francis-Landau, Bing Xue, Vivek Sarkar and Jason Eisner
4:10 - 4:20 Optimized Distributed Work-Stealing
Vivek Kumar, Karthik Murthy, Vivek Sarkar and Yili Zheng
4:20 - 5:30 Debate - Moderator: Andrew Lumsdaine (PNNL)
Panelists: Torsten Hoefler (ETH), Timothy Mattson (Intel),
Alessandro Morari (IBM), David Padua (UIUC), others TBA
Organizers
Antonino Tumeo, PNNL, [log in to unmask]
John Feo, PNNL, Northwest Institute for Advanced Computing (NIAC), [log in to unmask]
Oreste Villa, NVIDIA Research, [log in to unmask]
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