Call For Papers
The 1st European Developers Workshop will be held in Cambridge on
September 9-10th, 2010. We invite you to submit a paper and demonstrate
your work during the Developers Workshop.
Papers should be in the ACM SIGCOMM-style of between 4 and 8 pages in length.
Papers are due July 2nd, 2010.
Registration and Paper submission details will be sent shortly.
Previous NetFPGA Developers Workshops have seen papers across a range of topics:
- Hardware applications for payload scanning
- Methodology for high-level programming networking hardware
- Testbed deployments
- Data-plane virtualization
- Applications supporting soft radio, and traffic generation
We anticipate papers might range from applications that built new HDL for the NetFPGA through to applications built on top of the NetFPGA infrastructure (reference routers and openflow); the criteria is your paper describes work you can demonstrate and, ideally, leads to a code contribution to the NetFPGA project.
Program Chairs
- Andrew Moore, Cambridge Uni., UK
- Satnam Singh, Microsoft Research Cambridge, UK
Program Committee
- Gianni Antichi, Uni. of Pisa, Italy
- Gordon Brebner, Xilinx, USA
- Nick Feamster, Georgia Tech, USA
- Glen Gibb, Stanford University, USA
- David Greaves, Cambridge Uni., UK
- Jari Keinanen, Ericsson Research, Finland
- Wojciech Koszek, FreeBSD Project, Poland
- John Lockwood, Algo-Logic, USA
- David Miller, Cambridge Uni., UK
- Peter Ogden, Cambridge Uni. / UCL, UK
- Nadi Sarrar, TU Berlin/T-Labs, Germany
- Malcolm Scott, Cambridge Uni. / UCL, UK
- Scott Whyte, Google, USA
- Martin Zadnik, Brno Uni. of Technology, Czech Republic
Thank you,
Andrew W. Moore and Satnam Singh
Program Chairs
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