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Subject:

SVERTS workshop at UML 2003: CALL FOR CONTRIBUTIONS

From:

etaps02 VERIMAG <[log in to unmask]>

Reply-To:

etaps02 VERIMAG <[log in to unmask]>

Date:

Sun, 8 Jun 2003 09:58:16 +0200

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text/plain

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          [Apologies in case you receive multiple copies of this message]


                        *** Call for Contributions ***

                                   SVERTS
                          International Workshop on
 SPECIFICATION AND VALIDATION OF UML MODELS FOR REAL TIME AND EMBEDDED SYSTEMS
                       October 20, 2003, San Francisco

                http://www-verimag.imag.fr/EVENTS/2003/SVERTS/

                          hold in conjunction with the
    6TH INTERNATIONAL CONFERENCE ON THE UNIFIED MODELING LANGUAGE, UML 2003
                       October 20-24, 2003, San Francisco
                         http://www.umlconference.org/


Today's applications have often strong constraints with respect to time related
aspects. UML aims at providing an integrated modelling framework encompassing
architecture descriptions and behaviour descriptions. A first step to the
integration of time related characteristics into the modelling framework has
been achieved by the "UML profile for schedulability, Time and Performance". It
provides the basic concepts and a first attempt for a common syntax.
Nevertheless, in order to be able to exchange models and to build validation
tools, it is important to have a common understanding of the semantics of the
given notations. Other important issues in the domain of real-time is
methodology and modeling paradigms allowing to break down the complexity, and
tools which are able to verify well designed systems. This workshop should
bring together participants from academia and industry to discuss different
time related issues in the context of modeling and design of real-time systems.
The workshop aims to discuss the needs and possible solutions for handling
time related issues which should help to define a work programme in this field.

TOPICS: The workshop topics include

 Modeling hard and soft RT using UML
    - How to specify real-time requirements and characteristics in UML
    - How to enhance UML to capture real time in a convenient manner
    - Declarative versus operational real-time specifications
    - Integration of different execution and communication modes
 Semantic aspects of real-time in UML
    - Formal semantics of basic and derived concepts
    - Interpretations of annotations
 Methods and tools for the validation of RT systems and components
    - Ensure consistency of timing constraints throughout the system
    - Validation of time related properties
    - Validation of functional properties of time dependent systems
 Managing RT-component evolution throughout the development process

WORKSHOP FORMAT
This full-day workshop will consist of an invited presentation, presentations
of accepted contributions and in depth discussion of previously identified
subjects emerging from the submissions. A summary of the discussion will be
made available after the workshop.

INVITED SPEAKER
Felice Balarin - Cadence Berkeley Labs, USA

SUBMISSION & PUBLICATION
To contribute, please send a position paper or a technical contribution to
Susanne Graf or [log in to unmask] via e-mail. Position papers should
not exceed 5 pages, and technical papers 20 pages.
Preferably, submissions should be in postscript or pdf format.

Accepted submissions will be placed on the Workshop web site. Additionally,
a special section in the Journal on Tools for Technology Transfer (STTT)
will be published based on a selection of workshop contributions
(consisting of both long papers and position papers).

IMPORTANT DATES
Submission deadlines:          August 1, 2003
Notification of acceptance:    September 10, 2003
Workshop date:                 October 20, 2003

ORGANIZERS
Susanne Graf           (Verimag, Grenoble, France)
Øystein Haugen         (Ericsson)
Ileana Ober            (Verimag, Grenoble, France)
Bran Selic             (Rational, Canada)

PROGRAMME COMMITTEE
Werner Damm            (OFFIS, Oldenburg, Germany)
Bruce Douglass         (I-Logix)
Sebastien Gerard       (CEA-LIST, France)
Susanne Graf           (Verimag, Grenoble, France)
Øystein Haugen         (Ericsson)
David Harel            (Weizmann Institute, Israel)
Jozef Hooman           (Univ. Nijmegen, NL)
Ileana Ober            (Verimag, Grenoble, France)
Birger Møller-Pedersen (Ericsson)
Alan Moore             (Artisan)
Ina Schieferdecker     (Fraunhofer Fokus, Germany)
Bran Selic             (Rational, Canada)
Thomas Weigert         (Motorola, Chicago)
Joseph Sifakis         (Verimag, Grenoble, France)

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