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Call for Papeprs

Workshop on Theory and Practice of Timed Systems

(A satelite event of ETAPS 2002)

April 6-7, 2002, Grenoble, France

Organizers: Eugene Asarin, Oded Maler and Sergio Yovine

The study of time-dependent behavior is treated currently under different
titles by different communities.Classical problems of manufacturing
scheduling, for example, are considered as part of operation research and
industrial engineering. Similar but different scheduling problems are
encountered in the research on real-time operating systems. People who are
interested in semantics, verification or performance analysis are working on
models such as timed automata, timed Petri nets or max-plus algebra.
Electrical engineers have to consider propagation delays in their circuits
and designer of embedded controllers have to take into account the time it
takes for the controller to compute its reaction after sampling the
environment. The unifying theme underlying all these apparently different
domains is that they treat systems whose behavior depends upon combinations
of logical and temporal constraints, i.e. constraints on the distance
between the occurrences of two events.

The workshop goal is to promote the study of fundamental and practical
aspects of timed systems. The three major axes of interest are listed below:

  Foundations and semantics: contributions to a better theoretical
foundations for timed systems and timed formal languages as well as a
comparison between different models used by different communities (timed
automata, timed petri nets, max-plus algebra, etc.).

  Algorithms and tools: new algorithms and data-structures for analyzing
timed systems and resolving temporal constraints. are needed in order to
push timing technology into the real world.

  Applications: adaptation and specialization of timing technology to the
modeling and analysis of certain types of application domains in which
timing plays an important role (real-time software, hardware circuits and
problems of scheduling in manufacturing or telecommunication).

Topics include:

  The theory of timed languages
  The theory of timed automata, timed PN
  Verification and synthesis of timed systems
  Static and dynamic scheduling
  Data-structures for representing timed problems
  Algorithms for timing analysis
  Comparison of tools
  Resolution of logical and temporal constraints
  Composition of timed systems
  Applications (software, hardware)

Paper Submission:

Authors are invited to send 10-15 page abstracts (in postscript or pdf
format) to [log in to unmask] not later than
November 15th, 2001. Accepted papers will be published in Electronic Notes
in Theoretical Computer Science
and will be distributed among the participants.

Program committee:

  Rajeev Alur, U. Penn, Philadelphia
  Eugene Asarin, Verimag, Grenoble (co-chair)
  Ahmed Bouajjani, LIAFA, Paris
  Jordi Cortadella, U. Catalunya, Barcelona
  Sebastian Engell, U. of Dortmund
  Tom Henzinger, U. California, Berkeley
  Bengt Jonsson, U. of Uppsala
  Kim Larsen, U. of Aalborg
  Insup Lee, U. Penn, Philadelphia
  Oded Maler, Verimag, Grenoble (co-chair)
  Chris Myers, U. Utah, Salt Lake City
  Peter Niebert, U. Provence, Marseille
  Antoine Petit, ENS, Cachan
  Paul Petterson, U. of Uppsala
  Amir Pnueli, Weizmann Institute, Rehovot
  Alex Rabinovich, U. of Tel-Aviv
  Jean-Francois Raskin, Free University, Brussels
  Karem Sakallah, U. Michigan, Ann Arbor
  Ken Stevens, Intel, Hillsboro
  Wang Yi, U. of Uppsala
  Sergio Yovine, Verimag, Grenoble (co-chair)

Invited Speakers (tentative):

  Giorgio Buttazzo, University of Pavia
Towards Adaptive Real-Time Systems

  Avi Efrati, Intel Haifa
Timing Analysis of Real VLSI Circuits

  John Hooker, Carnegie-Mellon Univesity
Scheduling by a Combination of Mathematical and Constraint Programming

  Joseph Sifakis, Verimag Grenoble
Restricting the Behavior of Timed Systems

Important dates:

Submission: 15 November, 2001
Notification: 1 February, 2002
Final abstract due: 1 March, 2002
Workshop: 6-7 April, 2002

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Oded Maler             VERIMAG, Centre Equation, 2, av. de Vignate,
38610 Gieres, France. Phone: +33 (0) 476 63 48 35 Fax: 476 63 48 50
[log in to unmask]                http://www-verimag.imag.fr/~maler
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