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CALL FOR PARTICIPATION
Workshop on Dependable and Secure Nanocomputing (WDSN2009)
Monday June 29, 2009
http://www.laas.fr/WDSN09
at the 39th IEEE/IFIP Int. Conf. on Dependable Systems & Networks - DSN2009
June 29-July 2, 2008 -- Estoril, Lisbon - Portugal -- www.dsn.org
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MOTIVATION AND THEME
The Workshop is aimed at characterizing the impairments and threats attached
to the downscaling of current and future hardware technologies, as well as
distinguishing the design approaches and paradigms that have to be enforced
and/or favored in order to keep achieving dependable and secure computing.
Since its first edition in 2007, the Workshop constitutes an open forum
aimed at addressing the challenges posed to researchers and practitioners.
In particular, it has been instrumental in invigorating hardware-related
matters in the framework of DSN.
HIGHLIGHTS: INVITED TALKS
o Dr. Vikas Chandra, ARM R&D, San Jose, CA, USA
o Prof. Cecilia Metra, Universita di Bologna, Italy
--> See Abstracts & Bios from the Workshop Web site
PROGRAM
8:30 - 10:00 -- Session 1: Invited Talks
o Dependable Design in Nanoscale CMOS Technologies: Challenges
and Solutions
Vikas Chandra, ARM R&D, San Jose, CA, USA
o Trading Off Dependability and Cost for Nanoscale High Performance
Microprocessors: The Clock Distribution Problem
Cecilia Metra, Universita di Bologna, Italy
10:30 - 12:00 -- Session 2: Reliability Issues and Assessment
o Scaling Effects on Neutron-Induced Soft Error in SRAMs Down
to 22nm Process
Eishi Ibe, Hitoshi Taniguchi, Yasuo Yahagi, Ken-ichi Shimbo,
Tadanobu Toba; Hitachi Ltd, Yokohama, Japan
o On CMOS Circuit Reliability from MOSFETs and Input Vectors
Valeriu Beiu(1,2), Walid Ibrahim(1,3); (1) UAE Univ., Al-Ain, UAE;
(2) Univ. of Ulster, Londonderry, UK; (3) Carleton Univ., Ottawa,
Canada
o Impact of Manufacturing Defects on Carbon Nanotube Logic Circuits
Daniel Gil, David de Andres, Juan-Carlos Ruiz, Pedro Gil;
Univ. Politecnica de Valencia, Spain
o Enhanced Fault Coverage Analysis Using ABVFI
Scott Bingham, John Lach; Univ. of Virginia, Charlottesville, USA
13:30 - 15:00 -- Session 3: Resilience Enhancement Techniques
o Achieving Degradation Tolerance in a Hardware Accelerator
with Parallel Functional Units
Tomohiro Yoneda, Nat. Inst. of Informatics, Tokyo; Masashi Imai,
Univ. of Tokyo; Hiroshi Saito, Univ. of Aizu; Atsushi Matsumoto,
Tohoku Univ., Sendai; Japan
o Software Mechanisms for Tolerating Soft Errors in an Automotive
Brake-controller
Daniel Skarin, Johan Karlsson; Chalmers Univ. of Technology,
Goteborg, Sweden
o Power Efficient Redundant Execution for Chip Multiprocessors
Pramod Subramanyan(1), Virendra Singh(1), Kewal Saluja(2),
Erik Larsson(3);
(1) Indian Inst. of Science, Bangalore, India;
(2) Univ. of Wisconsin-Madison, USA; (3) Linkoping Univ., Sweden
o On the Stability and Robustness of Non-Synchronous Circuits
with Timing Loops
Matthias Fugger, Gottfried Fuchs, Ulrich Schmid, Andreas Steininger;
Vienna Univ. of Technology, Austria
15:30 - 16:00 -- Session 4 Panel - Scaling Towards Nanometer Size Devices:
Issues and Solutions
Panelists:
o Jacob A. Abraham, University of Texas, Austin, USA
Presentation title: TBD
o Valeriu Beiu UAE Univ., Al-Ain, UAE & Univ. of Ulster, Londonderry, UK
Why Brain-inspired Architectures Could Save the Day?
o Helia Naeimi, Intel Corporation, Santa Clara, CA, USA
Cross-Layer Resiliency for Nano-scale Technology
o Arun Somani, Iowa State University, Ames, USA
Presentation title: TBD
o Seongmoon Wang, NEC Laboratories America, Princeton, NJ, USA
Now Silicon is Cheap, but Testing is Expensive
WORKSHOP ORGANIZERS
o Jean Arlat, LAAS-CNRS, Toulouse, France
o Cristian Constantinescu, AMD, Fort Collins, CO, USA
o Ravishankar K. Iyer, UIUC, Urbana-Champaign, USA
o Johan Karlsson, Chalmers University of Technology, Goteborg, Sweden
o Michael Nicolaidis, TIMA, Grenoble, France
PROGRAM COMMITTEE
Jacob A. Abraham (US), Lorena Anghel (FR), Davide Appello (IT),
Vikas Chandra (US), Yves Crouzet (FR), Giorgio Di Natale (FR),
Babak Falsafi (CH), Richard E. Harper (US), Shubhendu S. Mukherjee (US),
Takashi Nanya (JP), Jean-Jacques Quisquater (BE),
Juan Carlos Ruiz Garcia (ES), Allan Silburt (CA), Arun Somani (US),
Janusz Sosnowski (PL), Andreas Steininger (AT), Alan Wood (US),
Yervant Zorian (US)
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