*********************** CALL FOR PARTICIPATION **********************
SVERTS: Specification and Validation of UML models for
Real Time and Embedded Systems
Workshop at the <<UML>> 2003 Conference
October 20, 2003
Fort Mason Center
San Francisco, California, USA
http://www-verimag.imag.fr/EVENTS/2003/SVERTS/
IMPORTANT DATES
28 September Early registration deadline
10 October Registration deadline
20 October Workshop
PRELIMINARY PROGRAMME
09:00-09:15 Welcome and Introduction (the organizers)
09:15-09:55 Invited talk: title to be announced
Felice Balarin, Cadence Berkely Labs
Session I: UML RT profiles (09:55 -14:45)
09:55-10:15 Timed annotations with UML
Susanne Graf, Ileana Ober, Iulian Ober
10:15-10:35 HybridUML profile for UML 2.0 and a critical view on UML 2.0
Kirsten Berkenkötter, Stefan Bisanz, Ulrich Hannemann and Jan Peleska
10:35-11:05 -- COFFEE BREAK--
11:05-11:25 Towards a "Synchronous Reactive" UML subprofile ?
Robert de Simone, Charles Andre
11:25-11:45 Issues in Mapping from UML Real-Time Profile to OSEK
Zonghua Gu, Shige Wang and Kang G. Shin
11:45-12:05 RT modeling with UML for safety critical applications: the
HIDOORS project example
Frank Lippert, Jean-Noël Meunier
12:05-12:25 A Profile for Integrating Function Blocks into the Unified
Modeling Language
Torsten Heverhagen, Rudolf Tracht, Robert Hirschfeld
12:25-13:55 -- LUNCH --
13:55-14:15 A proposed extension to UML: a hierarchical architecture
of temporal assertion components
Teitelbaum, Gallant, Mendelbaum, Vidal-Naquet
14:15-14:45 Discussion of presentations in session I
Session II: Issues in combining UML and time and validation(14:45 - 16:30)
14:45-15:05 A semantics of communicating reactive objects with timing
Mark van der Zwaag, Jozef Hooman
15:05-15:25 Validating Real-Time Behavioral Patterns of Embedded Controllers
J. Aghav, C. Petitpierre
15:25-15:55 -- COFFEE --
15:55-16:15 Validating timed UML models by simulation and verification
Iulian Ober, Susanne Graf, Ileana Ober abstract
16:15-16:30 Discussion of presentations in session II
Session III: RT in OCL (16:30-17:25)
16:30-16:50 Using OCL for expressing temporal validity constraints
Juliana Kuester-Filipe and Stuart Anderson abstract
16:50-17:10 Temporal OCL Extensions for Specification of Real-Time Constraints
Stephan Flake
17:10-17:25 Discussion of presentations in session III
17:25-17:30 Closing
PROGRAM COMMITTEE
Werner Damm (OFFIS, Oldenburg, Germany)
Bruce Douglass (I-Logix)
Sebastien Gerard (CEA-LIST, France)
Susanne Graf (Verimag, Grenoble, France)
Øystein Haugen (Ericsson)
David Harel (Weizmann Institute, Israel)
Jozef Hooman (Univ. Nijmegen, NL)
Ileana Ober (Verimag, Grenoble, France)
Birger Møller-Pedersen (Ericsson)
Alan Moore (Artisan)
Ina Schieferdecker (Fraunhofer Fokus, Germany)
Bran Selic (Rational, Canada)
Thomas Weigert (Motorola, Chicago)
Joseph Sifakis (Verimag, Grenoble, France)
ORGANIZERS
Susanne Graf (Verimag, Grenoble, France)
Øystein Haugen (Ericsson)
Ileana Ober (Verimag, Grenoble, France)
Bran Selic (Rational, Canada)
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