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Subject:

Call for papers: FATES/RV'06

From:

Klaus Havelund <[log in to unmask]>

Reply-To:

Klaus Havelund <[log in to unmask]>

Date:

Wed, 15 Feb 2006 02:56:05 +0000

Content-Type:

text/plain

Parts/Attachments:

Parts/Attachments

text/plain (218 lines)

===============================================

                                       Call for Papers

                                             for the

                          1st Joint International Workshop on
   FORMAL ASPECTS OF TESTING AND RUNTIME VERIFICATION
                                    (FATES/RV 2006)

                         http://www.fatesrv06.inf.ethz.ch


                               In affiliation with the
                      2006 Federated Logic Conference
                                   (FLoC 2006)

          Seattle, Washington, USA, August 15/16, 2006

===============================================


Objective and Scope
===============

Software validation is one of the most cost-intensive tasks in mo-
dern software production processes. The objective of FATES/RV'06
is to bring scientists from both academia and industry together to
discuss formal approaches to test and analyse programs and monitor
and guide their executions. Formal approaches to test may cover
techniques from areas like theorem proving, model checking, con-
straint resolution, static program analysis, abstract interpreta-
tion, Markov chains, and various others. Formal approaches to run-
time verification use formal techniques to improve traditional
ad-hoc monitoring techniques used in testing, debugging, perfor-
mance monitoring, fault protection, etc.

The aim of the FATES/RV workshop series is to be a forum for
researchers and developers to discuss the state of the art in
theory, application, tools and industrialization of formal
approaches to testing and runtime verification. The topics of
interest include:

* Fundamental aspects and new types of testing:
test derivation, test selection, test implementation
and execution, test result analysis, test stop criteria,
and how they appear in functional, interoperability,
performance, security, robustness tests.

* Combining different techniques in testing:
combined verification and testing approaches,
integrated approaches of black-box, grey-box
and integration testing, etc.

* Testing and Object Orientation:
Different testing techniques in OO, extreme programming,
aspect oriented programming, etc.

* Different formal models and modeling languages:
automata, logical, process algebra, algebraic data types,
grammars, Markov-chains, UML, SDL, MSC, LOTOS, Z, VDM, TTCN-3,
Timed Automata, synchronous languages, etc.

* Different application areas:
communication systems, control systems, embedded software,
Web-based systems, sensor networks, etc.

* Different testing algorithms:
testing techniques for model and program analysis:
automatic partitioning, coverage analysis, test derivation
(online and offline), test data selection, etc.

* Dynamic program analysis:
Techniques that gather information during program execution and use
it to conclude properties about the program, either during test or
in operation. Algorithms for detecting multi-threading errors in
execution traces, such as deadlocks and data races.

* Monitoring languages and logics:
While scientists have investigated logics and developed technologies
that are suitable for model checking and theorem proving,
monitoring can reveal new observation-based foundational logics.

* Program instrumentation:
The merge of Aspect Oriented Programming and Runtime Verification,
techniques for instrumenting programs, at the source code or object
code/byte code level, to emit relevant events to an observer.

* Program guidance:
Techniques for guiding the behavior of a program once its specifi-
cation is violated. This ranges from standard exceptions to advanced
planning. Guidance can also be used during testing to expose errors.

* Novel applications for run-time verification:
Formalisms that go beyond correctness properties.  This includes, but
certainly is not limited to, performance properties, survivability and
fault tolerance, and so on.


With formal approaches to testing and runtime verfication becoming
more mature, the focus of the workshop is not only on research
approaches, but also on the application and industrialization
of formal testing methodologies. Thus, in addition to research papers,
FATES/RV 2006 invites experience reports, industrial applications
and work-in-progress paper submissions. Experience reports should
address medium size case studies and their analysis with a tool
(preferably not ones own), which describe validation methodologies
with a clear outline of the theoretical background.
Industrial applications should report on large scale case studies
and their adoption in an industrial setting, preferably with
an analysis of the existing acceptance problems.


Submissions
==========

Each submission must explain the contribution and novelty in the
field making clear the current status of the work. The following
types of contributions to FATES/RV 2006 are solicited:

*       Research papers (up to 15 pages)
*       Experience reports (up to 15 pages)
*       Application and industrialization studies (up to 15 pages)
*       Work-in-progress or position papers (up to 8 pages)

If a submission is not a research paper, its kind (i.e., experience
report, application study, work-in-progress paper) has to be stated
explicitly before the title on the first page of the document.

All contributions will be reviewed by the Program Committee for
technical quality and for compliance with the workshop objectives.
All articles have to be submitted electronically in PDF format
(http://research.microsoft.com/floc06/) and have to follow the
Springer LNCS paper format (www.springer.de/comp/lncs/authors.html).
For the submission please ensure that your papers have page numbers.

Accepted papers will presumably be published in workshop proceedings
by Springer in the LNCS series (http://www.springeronline.com/lncs)
(or in ENTCS otherwise).


Important dates
============

* Deadline for submissions   : April 17, 2006
* Notification of acceptance  : May 15, 2006
* Camera-ready Copy           : June 1, 2006
* Workshop                         : August 15/16, 2006


Program Committee Co-Chairs
======================

Klaus Havelund        Kestrel Technology
       e-mail:             [log in to unmask]
       home page:      http://www.havelund.com

Manuel Nunez          Universidad Complutense de Madrid
       e-mail:             [log in to unmask]
       home page:      http://dalila.sip.ucm.es/~manolo/

Grigore Rosu            University of Illinois at Urbana-Champaign
       e-mail:             [log in to unmask]
       home page:      http://fsl.cs.uiuc.edu/~grosu/

Burkhart Wolff          Eidgenoessische Technische Hochschule Zuerich
       e-mail:             [log in to unmask]
       home page:      www.infsec.ethz.ch/people/wolffb


Program Committee
===============

*   Howard Barringer (Univ Manchester, UK) [log in to unmask]
*   Saddek Bensalem (VERIMAG, France) [log in to unmask]
*   Rachel Cardell-Oliver (Univ of Western Australia, Australia)
[log in to unmask]
*   Ana Cavalli (Inst National de Telecommunication, France)
[log in to unmask]
*   Doron Drusinsky (Naval Postgraduate School, USA) [log in to unmask]
*   Bernd Finkbeiner (Saarland Univ, Germany) [log in to unmask]
*   Cormac Flanagan (Univ California, Santa Cruz, USA) [log in to unmask]
*   Vijay Garg (Univ of Texas, Austin, USA) [log in to unmask]
*   Jens Grabowski, (Univ of Goettingen, Germany)
[log in to unmask]
*   Wolfgang Grieskamp (Microsoft Research, USA) [log in to unmask]
*   Yuri Gurevich (Microsoft Research, USA) [log in to unmask]
*   Robert M. Hierons (Brunel Univ, UK) [log in to unmask]
*   Gerard Holzmann (JPL, USA) [log in to unmask]
*   Insup Lee (Univ of Pennsylvania, USA) [log in to unmask]
*   Michael Moeller (Univ of Oldenburg, Germany)
[log in to unmask]
*   Brian Nielsen (Aalborg University, Denmark) [log in to unmask]
*   Jeff Offutt (George Mason Univ, USA) [log in to unmask]
*   Doron Peled (University of Warwick, UK) [log in to unmask]
*   Alexandre Petrenko (Comp Research Inst of Montreal, Canada) [log in to unmask]
*   Ina Schieferdecker (Fraunhofer FOKUS, Germany)
[log in to unmask]
*   Scott Stoller (State Univ of New York, Stony Brook, USA)
[log in to unmask]
*   Henny Sipma (Stanford Univ, USA) [log in to unmask]
*   Oleg Sokolsky (Univ of Pennsylvania, USA) [log in to unmask]
*   Serdar Tasiran (Koc Univ, Turkey) [log in to unmask]
*   Jan Tretmans (Radboud Univ Nijmegen, The Netherlands) [log in to unmask]
*   Umit Uyar (City Univ of New York, USA) [log in to unmask]
*   Carsten Weise (Ericsson Research and Development, Germany)
[log in to unmask]



Further Information
==============

For further information see the FATES/RV 2006 Web site
(http://www.fatesrv06.inf.ethz.ch/), the FLoC 2006
Web site (http://research.microsoft.com/floc06/), or contact directly one of
the program committee chairs.

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